Semiconductor device manufacturing includes various steps of device patterning processes. For example, the manufacturing of a semiconductor chip may start with, for example, a plurality of CAD (computer aided design) generated device patterns, which is then followed by effort to replicate these device patterns in a substrate. The replication process may involve the use of various exposing techniques, and a variety of subtractive (etching) and/or additive (deposition) material processing procedures. For example, in a photolithographic process, a layer of photo-resist material may first be applied on top of a substrate, and then be exposed selectively according to a pre-determined device pattern or patterns. Portions of the photo-resist that are exposed to light or other ionizing radiation (e.g., ultraviolet, electron beams, X-rays, etc.) may experience some changes in their solubility to certain solutions. The photo-resist may then be developed in a developer solution, thereby removing the non-irradiated (in a negative resist) or irradiated (in a positive resist) portions of the resist layer, to create a photo-resist pattern or photo-mask. The photo-resist pattern or photo-mask may subsequently be copied or transferred to the substrate underneath the photo-resist pattern.
With continuous scale-down and shrinkage of real estate in a semiconductor wafer available for a single semiconductor device, engineers are daily faced with the challenge of how to meet the market demand for ever increasing device density. For sub-80 nm pitch patterning, one technique is to achieve twice the pattern density through a technique called sidewall image transfer (SIT), which is also known as sidewall spacer image transfer. In a conventional SIT process, a blanket deposition of spacer making material, such as dielectric material, is usually performed after the mandrel litho development and spacers are then made out of the blanket layer of spacer making material through a directional etching process. However, this process generally creates only one type of spacers that have the same width, measured along the surface of the substrate, resulting only one critical dimension of a device pattern to be transferred to the underneath substrate. In reality, multiple critical dimensions of devices are usually more desirable.